WM8782
Production Data
PIN DESCRIPTION
PIN NO.
NAME
MCLK
DOUT
LRCLK
DGND
DVDD
BCLK
IWL
TYPE
Digital Input
DESCRIPTION
1
2
3
4
5
6
7
Master Clock
Digital Output
Digital Input / Output
Supply
ADC Digital Audio Data
Audio Interface Left / Right Clock
Digital Negative Supply
Digital Positive Supply
Audio Interface Bit Clock
Word Length
Supply
Digital Input / Output
Digital Tristate Input
0 = 16 bit
1 = 20 bit
Z = 24 bit
8
9
FSAMPEN
FORMAT
Digital Tristate Input
Digital Tristate Input
Fast Sampling Rate Enable
0 = 48ken
1= 96ken
Z= 192ken
Audio Mode Select
0 = RJ
1 = LJ
Z = I2S
10
11
12
13
14
15
16
17
18
19
20
VMID
VREFGND
VREFP
AVDD
Analogue Output
Supply
Midrail Voltage Decoupling Capacitor
Negative Supply and Substrate Connection
Analogue Output
Supply
Positive Reference Voltage Decoupling Pin; 10uF external decoupling
Analogue Positive Supply
AGND
AINOPR
AINR
Supply
Analogue Negative Supply and Substrate Connection
Right Channel Internal Op-Amp Output
Right Channel Input
Analogue Output
Analogue Input
Analogue Input
Analogue Output
Analogue Input
Digital Input
COM
Common mode high impedance input should be set to midrail.
Left Channel Internal Op-Amp Output
Left Channel Input
AINOPL
AINL
M/S
Interface Mode Select
0 = Slave mode (128fs, 192fs, 256fs, 384fs, 512fs, 768fs)
1 = Master mode (256fs, 128fs)
(fs=word clock frequency)
PD, August 2006, Rev 4.2
4
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
