WM8776
Production Data
2-WIRE SERIAL CONTROL MODE
The WM8776 supports software control via a 2-wire serial bus. Many devices can be controlled by
the same bus, and each device has a unique 7-bit address (this is not the same as the 7-bit address
of each register in the WM8776).
The WM8776 operates as a slave device only. The controller indicates the start of data transfer with
a high to low transition on DI while CL remains high. This indicates that a device address and data
will follow. All devices on the 2-wire bus respond to the start condition and shift in the next eight bits
on DI (7-bit address + Read/Write bit, MSB first). If the device address received matches the address
of the WM8776 and the R/W bit is ‘0’, indicating a write, then the WM8776 responds by pulling DI low
on the next clock pulse (ACK). If the address is not recognised or the R/W bit is ‘1’, the WM8776
returns to the idle condition and wait for a new start condition and valid address.
Once the WM8776 has acknowledged a correct address, the controller sends the first byte of control
data (B15 to B8, i.e. the WM8776 register address plus the first bit of register data). The WM8776
then acknowledges the first data byte by pulling DI low for one clock pulse. The controller then sends
the second byte of control data (B7 to B0, i.e. the remaining 8 bits of register data), and the WM8776
acknowledges again by pulling DI low.
The transfer of data is complete when there is a low to high transition on DI while CL is high. After
receiving a complete address and data sequence the WM8776 returns to the idle state and waits for
another start condition. If a start or stop condition is detected out of sequence at any point during
data transfer (i.e. DI changes while CL is high), the device jumps to the idle condition.
Figure 21 2-wire Serial Interface
1. B[15:9] are Control Address Bits
2. B[8:0] are Control Data Bits
The WM8776 has two possible device addresses, which can be selected using the CE pin.
CE STATE
Low
DEVICE ADDRESS
0011010 (0 x 34h)
0011011 (0 x 36h)
High
Table 11 2-Wire MPU Interface Address Selection
PD Rev 4.0 April 2005
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