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WM8775
R19 (13h)
0010011
0
NGAT
NGTH
0
Noise gate enable (ALC only)
0 : disabled
Noise Gate
Control
1 : enabled
4:2
000
Noise gate threshold
000: -78dBFS
001: -72dBfs
… 6 dB steps
110: -42dBFS
111: -36dBFS
R20 (14h)
0010100
3:0
MAXATTEN
[3:0]
0110
Maximum attenuation of PGA
Limiter
ALC
Limiter
Control
(attenuation below static)
0011 or lower: -3dB
0100: -4dB
(lower PGA gain limit)
1010 or lower: -1dB
1011 : -5dB
…. (-1dB steps)
….. (-4dB steps)
1110 : -17dB
1100 or higher: -12dB
1111 : -21dB
6:4
3:0
TRANWIN [2:0]
010
Length of Transient Window
000: 0us (disabled)
001: 62.5us
010: 125us
…..
111: 4ms
R21 (15h)
0010101
AMX[3:0]
0001
ADC left channel input mixer control bits
ADC Mixer
Control
AMX[3:0]
0001
ADC LEFT IN
AIN1L
ADC RIGHT IN
AIN1R
0010
AIN2L
AIN2L
0100
AIN3L
AIN3R
1000
AIN4L
AIN4R
6
7
MUTERA
MUTELA
0
0
Mute for right channel ADC
0: Mute off
1: Mute on
Mute for left channel ADC
0: Mute off
1: Mute on
8
LRBOTH
RESET
0
Setting LRBOTH will write the same gain value to RAG[7:0] and
LAG[7:0].
R23 (17h)
0010111
[8:0]
Not reset
Writing to this register will apply a reset to the device registers.
Software
Reset
Table 13 Register Map Description
PP Rev 1.8, June 2004
31
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