Production Data
WM8772
Test Conditions
AVDD, VREFP = 5V, DVDD = 3.3V, AGND, VREFN = 0V, DGND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs, 32-pin TQFP
version unless otherwise stated. ADC/DAC in Slave Mode unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ADC Performance
Input Signal Level (0dB)
2.0 x
REFADC/5
20
Vrms
Input resistance
Input capacitance
SNR (Note 1,2,4)
kΩ
pF
dB
10
A-weighted, 0dB gain
@ fs = 48kHz
80
100
SNR (Note 1,2,4)
A-weighted, 0dB gain
@ fs = 96kHz
100
dB
64 x OSR
SNR (Note 1,2,4)
SNR (Note 1,2,4)
A-weighted, 0dB gain
93
93
dB
dB
@ fs = 48kHz, AVDD =
3.3V
A-weighted, 0dB gain
@ fs = 96kHz, AVDD
= 3.3V
64 x OSR
kHz, 0dBFs
Total Harmonic Distortion (THD)
-80
-82
90
dB
dB
dB
dB
dB
dB
1kHz, -1dBFs
1kHz Input
ADC Channel Separation
Mute Attenuation
1kHz Input, 0dB gain
1kHz 100mVpp
90
Power Supply Rejection Ratio
PSRR
50
20Hz to 20kHz
100mVpp
45
Digital Logic Levels (CMOS Levels)
Input LOW level
VIL
VIH
0.3 x DVDD
1
V
V
Input HIGH level
0.7 x DVDD
0.9 x DVDD
Input leakage current
Input capacitance
0.2
5
µA
pF
V
Output LOW
VOL
VOH
I
OL=1mA
0.1 x DVDD
Output HIGH
I
OH= -1mA
V
Analogue Reference Levels
Reference voltage
VVMID
RVMID
VREFP/2 –
50mV
VREFP/2
50
VREFP/2 +
50mV
V
Potential divider resistance
VREFP to VMID and
VMID to VREFN
kΩ
Supply Current
Analogue supply current
Digital supply current
AVDD, VREFP = 5V
DVDD = 3.3V
45
16
mA
mA
Notes:
1. Ratio of output level with 1kHz full scale input, to the output level with all zeros into the digital input, measured ‘A’
weighted.
2. All performance measurements done with 20kHz low pass filter, and where noted an A-weight filter. Failure to use
such a filter will result in higher THD+N and lower SNR and Dynamic Range readings than are found in the Electrical
Characteristics. The low pass filter removes out of band noise; although it is not audible it may affect dynamic
specification values.
3. VMID decoupled with 10uF and 0.1uF capacitors (smaller values may result in reduced performance).
PD Rev 4.2 October 2005
11
w