Advanced Information
WM8753L
REGISTER
ADDRESS
BIT
6:5
LABEL
ADCPOL
DEFAULT
00
DESCRIPTION
R2 (02h)
ADC Control
00 = Polarity not inverted
01 = L polarity invert
[1:0]
10 = R polarity invert
11 = L and R polarity invert
4
VXFILT
HPMODE
0
ADC Filter Select
0 = HiFi Filter
1 = Voice FIlter
3:2
00
ADC High pass Filter Cut-off
Select
00 = 3.4Hz @ fs = 48kHz
01 = 82Hz @ fs = 16kHz
(41Hz @ fs = 8kHz)
10 = 82Hz @ fs = 8kHz
(164Hz @ fs = 16kHz)
11 = 170Hz @ fs = 8kHz
(340Hz @ fs = 16kHz)
1
0
HPOR
0
0
Store dc offset
1 = store offset
0 = clear offset
ADCHPD
ADC High Pass Filter Enable
(Digital)
1 = Disable High Pass Filter
0 = Enable High Pass Filter
Table 18 ADC Signal Path Control
DIGITAL ADC VOLUME CONTROL
The output of the ADCs can be digitally amplified or attenuated over a range from –97dB to +30dB in
0.5dB steps. The volume of each channel can be controlled separately. The gain for a given eight-bit
code X is given by:
0.5 × (X-195) dB for 1 ≤ X ≤ 255;
MUTE for X = 0
The LAVU and RAVU control bits control the loading of digital volume control data. When LAVU or
RAVU are set to 0, the LADCVOL or RADCVOL control data will be loaded into the respective control
register, but will not actually change the digital gain setting. Both left and right gain settings are
updated when either LAVU or RAVU are set to 1. This makes it possible to update the gain of both
channels simultaneously.
AI Rev 3.1 June 2004
30
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
