WM8753L
Advanced Information
REGISTER
ADDRESS
BIT
8:7
LABEL
DEFAULT
00
DESCRIPTION
ALC function select
00 = ALC off (PGA gain set by register)
01 = Right channel only
R12 (0Ch)
ALC Control 1
ALCSEL
[1:0]
(OFF)
10 = Left channel only
11 = Stereo (PGA registers unused)
6:4
3:0
MAXGAIN
[2:0]
111
(+30dB)
Set Maximum Gain of PGA
111 : +30dB
110 : +24dB
….(-6dB steps)
001 : -6dB
000 : -12dB
ALCL
[3:0]
1011
(-12dB)
ALC target – sets signal level at ADC
input
0000 = -28.5dB FS
0001 = -27.0dB FS
… (1.5dB steps)
1110 = -7.5dB FS
1111 = -6dB FS
R13 (0Dh)
8
ALCZC
0 (zero
ALC uses zero cross detection circuit.
cross off)
ALC Control 2
7:4
ALCSR[3:0] 0000
ALC sample rate control (only used
when in PCM mode, otherwise SR[4:0]
bits control the sample rate)
3:0
7:4
3:0
HLD
[3:0]
0000
(0ms)
ALC hold time before gain is increased.
0000 = 0ms
0001 = 2.67ms
0010 = 5.33ms
… (time doubles with every step)
1111 = 43.691s
R14 (0Eh)
ALC Control 3
DCY
[3:0]
0011
(192ms)
ALC decay (gain ramp-up) time
0000 = 24ms
0001 = 48ms
0010 = 96ms
… (time doubles with every step)
1010 or higher = 24.58s
ATK
[3:0]
0010
(24ms)
ALC attack (gain ramp-down) time
0000 = 6ms
0001 = 12ms
0010 = 24ms
… (time doubles with every step)
1010 or higher = 6.14s
Table 21 ALC Control
AI Rev 3.1 June 2004
33
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
