Production Data
WM8750JL
Note that the PGA Control Zero Cross function described earlier (see “Input Signal Path”) also has a
timeout function. Because the ALC function applies volume changes via a series of small changes,
the ALC Zero Cross timeout needs to be many times faster than the normal, register-controlled PGA
volume control. This improves the ALC response, in particular when handling small signals, where the
zero-cross function may be less effective.
The ALC zero-cross timeout is duration is fixed in relation to MCLK. The maximum ALC zero-cross
timeout period is given by the equation below. In the case of a 12.288MHz MCLK, the maximum
timeout duration is approximately 21ms.
PEAK LIMITER
To prevent clipping when a large signal occurs just after a period of quiet, the ALC circuit includes a
limiter function. If the ADC input signal exceeds 87.5% of full scale (–1.16dB), the PGA gain is
ramped down at the maximum attack rate (as when ATK = 0000), until the signal level falls below
87.5% of full scale. This function is automatically enabled whenever the ALC is enabled.
Note:
If ATK = 0000, then the limiter makes no difference to the operation of the ALC. It is designed to
prevent clipping when long attack times are used.
NOISE GATE
When the signal is very quiet and consists mainly of noise, the ALC function may cause “noise
pumping”, i.e. loud hissing noise during silence periods. The WM8750JL has a noise gate function
that prevents noise pumping by comparing the signal level at the LINPUT1/2/3 and/or RINPUT1/2/3
pins against a noise gate threshold, NGTH. The noise gate cuts in when:
Signal level at ADC [dB] < NGTH [dB] + PGA gain [dB] + Mic Boost gain [dB]
This is equivalent to:
Signal level at input pin [dB] < NGTH [dB]
The ADC output can then either be muted or alternatively, the PGA gain can be held constant
(preventing it from ramping up as it normally would when the signal is quiet).
The table below summarises the noise gate control register. The NGTH control bits set the noise gate
threshold with respect to the ADC full-scale range. The threshold is adjusted in 1.5dB steps. Levels
at the extremes of the range may cause inappropriate operation, so care should be taken with set–up
of the function. Note that the noise gate only works in conjunction with the ALC function, and always
operates on the same channel(s) as the ALC (left, right, both, or none).
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R20 (14h)
NGTH
00000
Noise gate threshold
7:3
Noise Gate
Control
[4:0]
17
17
-76.5dBfs
-75dBfs
… 1.5 dB steps
11110 -31.5dBfs
11111 -30dBfs
NGG
[1:0]
00
0
Noise gate type
2:1
0
X0 = PGA gain held constant
01 = mute ADC output
11 = reserved (do not use this setting)
Noise gate function enable
1 = enable
NGAT
0 = disable
Table 14 Noise Gate Control
Note:
The performance of the ADC may degrade at high input signal levels if the monitor bypass mux is
selected with MIC boost and ALC enabled.
PD, April 2012, Rev 4.1
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
