WM8750JL
Production Data
REGISTER
ADDRESS
BIT
8:7
LABEL
ALCSEL
DEFAULT
DESCRIPTION
ALC function select
R17 (11h)
00
ALC Control 1
[1:0]
(OFF)
00 = ALC off (PGA gain set by register)
01 = Right channel only
10 = Left channel only
11 = Stereo (PGA registers unused)
Note: ensure that LINVOL and
RINVOL settings (reg. 0 and 1) are
the same before entering this mode.
6:4
3:0
MAXGAIN
[2:0]
111
(+30dB)
Set Maximum Gain of PGA
111 : +30dB
110 : +24dB
….(-6dB steps)
001 : -6dB
000 : -12dB
ALCL
[3:0]
1011
ALC target – sets signal level at ADC
input
(-12dB)
0000 = -28.5dB FS
0001 = -27.0dB FS
… (1.5dB steps)
1110 = -7.5dB FS
1111 = -6dB FS
R18 (12h)
7
ALCZC
0 (zero
cross
off)
ALC Zero Cross detect
0 = Change gain immediately
1 = Change gain on zero cross only
ALC hold time before gain is increased.
0000 = 0ms
ALC Control 2
3:0
HLD
[3:0]
0000
(0ms)
0001 = 2.67ms
0010 = 5.33ms
… (time doubles with every step)
1111 = 43.691s
R19 (13h)
7:4
3:0
DCY
[3:0]
0011
ALC decay (gain ramp-up) time
0000 = 24ms
ALC Control 3
(192ms)
0001 = 48ms
0010 = 96ms
… (time doubles with every step)
1010 or higher = 24.58s
ALC attack (gain ramp-down) time
0000 = 6ms
ATK
[3:0]
0010
(24ms)
0001 = 12ms
0010 = 24ms
… (time doubles with every step)
1010 or higher = 6.14s
Table 13 ALC Control
Note: For correct ALC operation in differential input mode it is recommended that the ALC is not used
with a combined signal gain (mic boost and PGA) greater than 30dB.
ALC ZERO CROSS
The ALC Zero Cross function can be used to ensure that the ALC volume updates will be timed to
coincide with a suitable zero-crossing of the audio signal. This avoids audible ‘zipper noise’ effects of
instantaneous volume changes. The ALC Zero Cross function includes a timeout to ensure that the
gain is updated even if a zero cross does not occur. If the signal level is small, it is possible that a
zero cross does not occur, due to DC offset within the signal path. In this case, the timeout will ensure
that the ALC volume change is still executed.
PD, April 2012, Rev 4.1
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