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WM8750CLSEFL 参数 Datasheet PDF下载

WM8750CLSEFL图片预览
型号: WM8750CLSEFL
PDF下载: 下载PDF文件 查看货源
内容描述: 立体声编解码器用于便携式音频应用 [Stereo CODEC for Portable Audio Applications]
分类和应用: 解码器编解码器便携式
文件页数/大小: 65 页 / 733 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8750L  
Production Data  
OUT3 OUTPUT  
The OUT3 pin can drive a 16or 32headphone or a line output or be used as a DC reference for a  
headphone output (see Headphone Output section). It can be selected to either drive out an inverted  
ROUT1 or inverted MONOOUT for e.g. an earpiece drive between OUT3 and LOUT1 or differential  
output between OUT3 and MONOOUT. OUT3 can also drive an un-inverted ROUT1 signal, which  
originates at the right mixer output before the output PGA.  
OUT3SW selects the mode of operation required.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R24 (18h)  
OUT3SW  
[1:0]  
OUT3 select  
00 : VREF  
8:7  
00  
Additional  
Control (2)  
01 : ROUT1 signal (volume controlled by  
ROUT1VOL)  
10 : MONOOUT  
11 : right mixer output (no volume  
control through ROUT1VOL)  
Table 28 OUT3 Select  
ENABLING THE OUTPUTS  
Each analogue output of the WM8750L can be separately enabled or disabled. The analogue mixer  
associated with each output is powered on or off along with the output pin. All outputs are disabled by  
default. To save power, unused outputs should remain disabled.  
Outputs can be enabled at any time, except when VREF is disabled (VR=0), as this may cause pop  
noise (see “Power Management” and “Applications Information” sections)  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R26 (1Ah)  
LOUT1  
LOUT1 Enable  
6
5
4
3
2
1
0
0
0
0
0
0
Power  
Management  
(2)  
ROUT1  
LOUT2  
ROUT2  
MONO  
OUT3  
ROUT1 Enable  
LOUT2 Enable  
ROUT2 Enable  
MONOOUT Enable  
OUT3 Enable  
Note: All “Enable” bits are 1 = ON, 0 = OFF  
Table 29 Analogue Output Control  
Whenever an analogue output is disabled, it remains connected to VREF (pin 20) through a resistor.  
This helps to prevent pop noise when the output is re-enabled. The resistance between VREF and  
each output can be controlled using the VROI bit in register 27. The default is low (1.5k), so that any  
capacitors on the outputs can charge up quickly at start-up. If a high impedance is desired for  
disabled outputs, VROI can then be set to 1, increasing the resistance to about 40k.  
REGISTER  
ADDRESS  
BIT  
LABEL  
VROI  
DEFAULT  
DESCRIPTION  
R27 (1Bh)  
VREF to analogue output resistance  
6
0
Additional (1)  
0: 1.5 k  
1: 40 k  
Table 30 Disabled Outputs to VREF Resistance  
PD, Rev 4.4, August 2012  
36  
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