WM8750-EV1M
APPENDIX
EXTERNAL DSP CONNECTION TO THE WM8750-EV1B
The WM8750-EV1B evaluation board has been designed to allow it to be easily connected to
an external DSP platform with error free operation.
The following information is provided to ease the connection process and ensure that all
signals sent and received by the WM8750-EV1B are reliable and at the correct voltage
levels.
AUDIO INTERFACE CONNECTIONS
It is recommended that twisted pair (signal twisted with GND) or shielded wires are used to
make the audio interface connections between the DSP and WM8750-EV1B platforms. This
is to ensure that no interference or noise is picked up by the clocks or data lines, thus
reducing performance and reliability.
When the WM8750 is set in Slave Mode, the jumpers on header H1 should be removed,
disconnecting the digital input section of the evaluation board. The audio interface timing
and data signals from the DSP platform should then be connected as shown in Figure 25.
The signals should be connected to H1 and not to the header strips J15 and J21 running up
each side of the device. Connecting the signals to the output side of the level-shift IC (U4)
will cause drive contention between U4 and the DSP and could result in damage to either or
both devices. In most cases, the DSP supplies will be set around 3V for low power portable
applications. The inputs to the level-shift IC (74ALVC164245) have a TTL threshold (i.e.
Logic High = +2V(min); Logic Low = +0.8V(max)) and low input current requirements (i.e.
15uA max) allowing most DSPs to connect directly.
MCLK
GND
DACDAT
GND
DACLRC
GND
BCLK
GND
H1
Figure 25 Connections from DSP Platform
The digital inputs to the WM8750 have a CMOS threshold (i.e. Logic High (min) =
DBVDDx0.7; Logic Low (max) = DBVDDx0.3). These are met directly by the level shift IC
outputs.
The jumpers on H2 should also be removed, disconnecting the digital output section of the
WM8750 evaluation board. The ADCDAT data from the WM8750 should then be connected
to the DSP via pin 8 of header strip J15 and the GND connection should be taken from pin 4
of header strip J15.
The ADCDAT signal should be taken direct from the WM8750 digital output as the output
side of the level-shift IC (U4) from the WM8750 is pulled up to +5V which may overdrive and
cause damage to the DSP inputs. The digital output levels of the WM8750 are Logic High
(min) = DBVDDx0.9; Logic Low (max) = DBVDDx0.1 which should meet the input level
requirements of most DSPs running at +3V supplies. If the DSP is running with +5V supplies
then the connections to it should be made from the output side of the level-shift IC (U4),
connecting the signals as shown in Figure 26.
Rev 2.0, February 2005
38
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
