Production Data
WM8737L
Test Conditions
DCVDD = 1.5V, AVDD = MVDD = 3.3V, TA = +25oC, 1kHz -1dBFS signal, Normal Power Mode, fs = 48kHz, PGA gain = 0dB, 24-
bit audio data, unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V rms
dB
Line Inputs (LINPUT1/2/3, RINPUT1/2/3) to ADC – MIC pre-amp BYPASSED
Full Scale Input Signal Level
(for ADC 0dB Input at 0dB Gain)
Signal to Noise Ratio
(A-weighted)
AVDD = 3.3V
AVDD = 1.8V
1.0
0.545
97
SNR
AVDD = 3.3V,
90
Normal Power Mode
AVDD = 2.7V,
(Note 1)
95
Normal Power Mode
AVDD = 1.8V,
92
Normal Power Mode
AVDD = 3.3V,
95
Low Power Mode
AVDD = 2.7V,
93
Low Power Mode
AVDD = 1.8V,
90
Low Power Mode
-60dBFS,
Dynamic Range
(A-weighted)
(Note 2)
DNR
THD
90
97
95
dB
Normal Power Mode
-60dBFS,
Low Power Mode
-1dB input
Total Harmonic Distortion
(Note 3)
-84 (0.006%)
dB
%
-1dB input,
AVDD=1.8V
-81 (0.009%)
105
ADC Channel Separation
(Note 4)
1kHz signal
1kHz signal
dB
dB
Channel Matching
0.2
Programmable Gain Amplifier (PGA)
Programmable Gain
-97
0
30
dB
dB
dB
Programmable Gain Step Size
Monotonic
0.5
Gain Error (Deviation from ideal
0.5dB/step gain characteristic)
1kHz signal
-0.3
0.3
Input Resistance
0dB gain
30
1.9
k
30dB gain
Input Capacitance
16.9pF
pF
Automatic Level Control (ALC)
Typical Record Level
-18
-3
dB
ms
Gain Hold Time (Note 5)
tHLD
tDCY
tATK
0, 2.67, 5.33, 10.67, … , 43691
(time doubles with each step)
33.6, 67.2, 134.4, … , 3441
(time doubles with each step)
8.4, 16.8, 33.6, … , 8600
MCLK = 12.288MHz
(Note 3)
Gain Ramp-Up (Decay) Time
(Notes 6, 7)
ms
ms
Gain Ramp-Down (Attack) Time
(Notes 6, 7)
(time doubles with each step)
PD, Rev 4.4, January 2012
7
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