WM8728
Production Data
DIGITAL AUDIO INTERFACE
Audio data is applied to the internal DAC filters via the Digital Audio Interface. Five popular
interface formats are supported:
•
•
•
•
•
Left Justified mode
Right Justified mode
I2S mode
DSP Early mode
DSP Late mode
All five formats send the MSB first and support word lengths of 16, 20, 24 and 32 bits with the
exception that 32 bit data is not supported in right justified mode. DIN and LRCIN maybe
configured to be sampled on the rising or falling edge of BCKIN.
In left justified, right justified and I2S modes, the digital audio interface receives data on the DIN
input. Audio Data is time multiplexed with LRCIN indicating whether the left or right channel is
present. LRCIN is also used as a timing reference to indicate the beginning or end of the data
words. The minimum number of BCKINs per LRCIN period is 2 times the selected word length.
LRCIN must be high for a minimum of word length BCKINs and low for a minimum of word length
BCKINs. Any mark to space ratio on LRCIN is acceptable provided the above requirements are
met
The WM8728 will automatically detect when data with a LRCIN period of exactly 32 BCKINs is
sent, and select 16-bit mode - overriding any previously programmed word length. Word length
will revert to a programmed value only if a LRCIN period other than 32 BCKINs is detected.
In DSP early or DSP late mode, the data is time multiplexed onto DIN. LRCIN is used as a frame
sync signal to identify the MSB of the first word. The minimum number of BCKINs per LRCIN
period is 2 times the selected word length. Any mark to space ratio is acceptable on LRCIN
provided the rising edge is correctly positioned. (See Figure 9 and Figure 10)
LEFT JUSTIFIED MODE
In left justified mode, the MSB is sampled on the first rising edge of BCKIN following a LRCIN
transition. LRCIN is high during the left data word and low during the right data word.
1/fs
LEFT CHANNEL
RIGHT CHANNEL
LRCIN
BCKIN
DIN
1
2
3
n
n-2 n-1
1
2
3
n
n-2 n-1
MSB
LSB
MSB
LSB
Figure 6 Left Justified Mode Timing Diagram
PD Rev 4.2 April 2004
13
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
