WM8725
Production Data
Figure 2 Power on/off Reset Timing
SYMBOL
Vpor
Min
0.85
2.25
Typ
1.0
2.5
Max
1.2
Unit
V
Vpor_off
2.75
V
Table 1 Power on/off Reset Timing
At power on, when VDD and VMID have been established, PORB is released and the
WM8725 has been reset.
At power down, PORB is asserted low whenever VMID drops below the minimum threshold of
Vpor_off.
If VDD is removed at any time, the internal power-on reset circuit is powered down and PORB
will follow VDD.
PD ,Rev 4.3, February 2012
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