WM8720
Production Data
AUDIO DATA INTERFACE
The Serial Data interface to WM8720 is fully compatible with both normal (MSB first, right-justified) or
I2S interfaces. Data may be ‘packed’ (number of serial bit clocks per LRCIN period is exactly 2 times
the number of data bits, i.e. normally 32 in 16-bit mode) or unpacked (more than 32 bit clocks per
LRCIN period).
The WM8720 will automatically detect 16-bit packed data being sent to the device in normal mode,
and accept the data in this input format accordingly.
I2S MODE
DESCRIPTION
0
Normal format (MSB-first, right justified)
I2S format (Philips serial data protocol )
1
Table 2 Serial Interface Formats
1/fs
LEFT CHANNEL
RIGHT CHANNEL
LRCIN
BCKIN
1
2
3
1
2
3
n-2 n-1
n
n-2 n-1 n
DIN
MSB
MSB
LSB
LSB
Figure 4 Normal Data Input Timing
1/fs
LEFT CHANNEL
RIGHT CHANNEL
LRCIN
BCKIN
1
2
3
n-2 n-1
n
1
2
3
n-2 n-1
n
DIN
LSB
MSB
LSB
MSB
Figure 5 I2S Data Input Timing
PD Rev 4.0. February 2005
9
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
