WM8720
Production Data
LRCIN
tBCH
tBCL
tLB
BCKIN
DIN
tBCY
tBL
tDS
tDH
Figure 1 Audio Data Input Timing
Test Conditions
AVDD, DVDD = 5V, AGND, DGND = 0V, TA = +25oC, fs = 48kHz, SCKI = 256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Audio Data Input Timing Information
BCKIN pulse cycle time
BCKIN pulse width high
BCKIN pulse width low
tBCY
tBCH
tBCL
tBL
100
40
ns
ns
ns
ns
40
BCKIN rising edge to
LRCIN edge
20
LRCIN rising edge to
BCKIN rising edge
tLB
20
ns
DIN setup time
DIN hold time
tDS
tDH
20
20
ns
ns
tSCKIL
SCKI
tSCKIH
tSCKY
Figure 2 System Clock Timing Requirements
Test Conditions
AVDD, DVDD = 5V, AGND, DGND = 0V, TA = +25oC, fs = 48kHz, SCKI = 256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
System Clock Timing Information
System clock pulse width high
System clock pulse width low
System clock cycle time
tSCKIH
tSCKIL
tSCKY
10
10
27
ns
ns
ns
PD Rev 4.0 February 2005
6
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
