WM8720
Production Data
tMLS
tMLL
tMLH
ML/12S
MC/IWL
MD/DM
tMCH
tMCL
tMCY
tMDS
tMDH
Figure 3 Program Register Input Timing
Test Conditions
AVDD, DVDD = 5V, AGND, DGND = 0V, TA = +25oC, fs = 48kHz, SCKI = 256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Program Register Input Information
MC/IWL pulse cycle time
MC/IWL pulse width low
MD/DM pulse width high
MD/DM set-up time
tMCY
tMCL
tMCH
tMDS
tMDH
tMLL
tMLS
tMLH
100
40
40
20
20
20
20
20
ns
ns
ns
ns
ns
ns
ns
ns
MC/IWL hold time
ML/I2S pulse width low
ML/I2S set-up time
ML/I2S hold time
Notes:
1.
Ratio of output level with 1kHz full scale input, to the output level with all zeros into the digital input, measured “A”
weighted over a 20Hz to 20kHz bandwidth.
2.
All performance measurements done with 20kHz low pass filter. Failure to use such a filter will result in higher
THD+N and lower SNR and Dynamic Range readings than are found in the Electrical Characteristics. The low
pass filter removes out of band noise; although it is not audible it may affect dynamic specification values.
PD Rev 4.0. February 2005
7
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
