WM8711BL
Production Data
DESCRIPTION
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
0000111
1:0
FORMAT[1:0]
10
Audio Data Format Select
Digital Audio
Interface Format
11 = DSP Mode, frame sync + 2 data
packed words
10 = I2S Format, MSB-First left-1
justified
01 = MSB-First, left justified
00 = MSB-First, right justified
Input Audio Data Bit Length Select
11 = 32 bits
3:2
IWL[1:0]
10
10 = 24 bits
01 = 20 bits
00 = 16 bits
4
LRP
0
DACLRC phase control (in left, right or
I2S modes)
1 = Right Channel DAC data when
DACLRC high
0 = Right Channel DAC data when
DACLRC low
(opposite phasing in I2S mode)
or
DSP mode A/B select ( in DSP mode
only)
1 = Mode A (MSB is available on 2nd
BCLK rising edge after DACLRC rising
edge)
0 = Mode B (MSB is available on 1st
BCLK rising edge after DACLRC rising
edge)
5
6
7
LRSWAP
MS
0
0
0
DAC Left Right Clock Swap
1 = Right Channel DAC Data Left
0 = Right Channel DAC Data Right
Master Slave Mode Control
1 = Enable Master Mode
0 = Enable Slave Mode
Bit Clock Invert
BCLKINV
1 = Invert BCLK
0 = Don’t invert BCLK
PD, Rev 4.2, December 2011
3644
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
