WM8711BL
Production Data
Once the WM8711BL has acknowledged a correct address, the controller will send eight data bits
(bits B[15]-B[8]). WM8711BL will then acknowledge the sent data by pulling SDIN low for one clock
pulse. The controller will then send the remaining eight data bits (bits B[7]-B[0]) and the WM8711BL
will then acknowledge again by pulling SDIN low.
A stop condition is defined when there is a low to high transition on SDIN while SCLK is high. If a start
or stop condition is detected out of sequence at any point in the data transfer then the device will
jump to the idle condition.
After receiving a complete address and data sequence the WM8711BL returns to the idle state and
waits for another start condition. Each write to a register requires the complete sequence of start
condition, device address and R/W bit followed by the 16 register address and data bits.
POWER DOWN MODES
The WM8711BL contains power conservation modes in which various circuit blocks may be safely
powered down in order to conserve power. This is software programmable as shown in the table
below.
REGISTER
ADDRESS
BIT
LABEL
DACPD
DEFAULT
DESCRIPTION
0000110
3
4
5
6
7
1
DAC Power Down
Power Down
Control
1 = Enable Power Down
0 = Disable Power Down
Line Output Power Down
1 = Enable Power Down
0 = Disable Power Down
Oscillator Power Down
1 = Enable Power Down
0 = Disable Power Down
CLKOUT Power Down
1 = Enable Power Down
0 = Disable Power Down
Power Off Device
OUTPD
1
0
0
1
OSCPD
CLKOUTPD
POWEROFF
1 = Device Power Off
0 = Device Power On
Table 19 Power Conservation Modes Software Control
The power down control can be used to either a) permanently disable functions when not required in
certain applications or b) to dynamically power up and down functions depending on the operating
mode, e.g.: during playback or record. Please follow the special instructions below if dynamic
implementations are being used.
PD, Rev 4.2, December 2011
3244
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
