WM8580
Production Data
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Controls phase of DAC outputs
R18
5:0
PHASE [5:0]
111111
DAC
Control 4
PHASE[0] = 0 inverts phase of DAC1L output
PHASE[1] = 0 inverts phase of DAC1R output
PHASE[2] = 0 inverts phase of DAC2L output
PHASE[3] = 0 inverts phase of DAC2R output
PHASE[4] = 0 inverts phase of DAC3L output
PHASE[5] = 0 inverts phase of DAC3R output
DAC channel soft mute enables
12h
R19
2:0
DMUTE[2:0]
000
DAC
Control 5
DMUTE[0] = 1, enable soft-mute on DAC1
DMUTE[1] = 1, enable soft-mute on DAC2
DMUTE[2] = 1, enable soft-mute on DAC3
13h
4
5
6
MUTEALL
DZCEN
0
0
0
DAC channel master soft mute. Mutes all DAC channels
0 = disable soft-mute on all DACs
1 = enable soft-mute on all DACs
DAC Digital Volume Zero Cross Enable
0 = Zero Cross detect disabled
1 = Zero Cross detect enabled
DACATC
Attenuator Control
0 = All DACs use attenuations as programmed.
1 = Right channel DACs use corresponding left DAC
attenuations
7
MPDENB
0
MUTE pin decode enable
0 = MUTE activates soft-mute on DAC selected by DZFM
1 = MUTE activates softmute on all DACs
R20
7:0
8
LDA1[7:0]
UPDATE
11111111
(0dB)
Digital Attenuation control for DAC1 Left Channel (DACL1) in
0.5dB steps. See Table 23
Digital
Attenuation
DACL 1
Not latched
Controls simultaneous update of all Attenuation Latches
0 = Store LDA1 in intermediate latch (no change to output)
1 = Apply LDA1 and update attenuation on all channels
14h
R21
7:0
8
RDA1[6:0]
UPDATE
11111111
(0dB)
Digital Attenuation control for DAC1 Right Channel (DACR1) in
0.5dB steps. See Table 23
Digital
Attenuation
DACR 1
Not latched
Controls simultaneous update of all Attenuation Latches
0 = Store RDA1 in intermediate latch (no change to output)
1 = Apply RDA1 and update attenuation on all channels
15h
R22
7:0
8
LDA2[7:0]
UPDATE
11111111
(0dB)
Digital Attenuation control for DAC2 Left Channel (DACL2) in
0.5dB steps. See Table 23
Digital
Attenuation
DACL 2
Not latched
Controls simultaneous update of all Attenuation Latches
0 = Store LDA2 in intermediate latch (no change to output)
1 = Apply LDA2 and update attenuation on all channels
16h
R23
7:0
8
RDA2[7:0]
UPDATE
11111111
(0dB)
Digital Attenuation control for DAC2 Right Channel (DACR2) in
0.5dB steps. See Table 23
Digital
Attenuation
DACR 2
Not latched
Controls simultaneous update of all Attenuation Latches
0 = Store RDA2 in intermediate latch (no change to output)
1 = Apply RDA2 and update attenuation on all channels
17h
R24
7:0
8
LDA3[7:0]
UPDATE
11111111
(0dB)
Digital Attenuation control for DAC3 Left Channel (DACL3) in
0.5dB steps. See Table 23
Digital
Attenuation
DACL 3
Not latched
Controls simultaneous update of all Attenuation Latches
0 = Store LDA3 in intermediate latch (no change to output)
1 = Apply LDA3 and update attenuation on all channels
18h
R25
7:0
RDA3[7:0]
11111111
(0dB)
Digital Attenuation control for DAC3 Right Channel (DACR3) in
0.5dB steps. See Table 23.
Digital
PD Rev 4.3 August 2007
82
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
