Production Data
WM8580
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R15
1:0
DAC1SEL
[1:0]
00
DAC digital input select
DAC
Control 1
00 = DAC takes data from DIN1
01 = DAC takes data from DIN2
10 = DAC takes data from DIN3
3:2
5:4
8
DAC2SEL
[1:0]
01
10
0
0Fh
DAC3SEL
[1:0]
RX2DAC_MODE
DAC oversampling rate and power down control (only valid when
DAC_SRC = 00, S/PDIF receiver)
0 = SFRM_CLK determines oversampling rate, DACs 2/3
powered down
1 = PAIFRX_LRCLK determines oversampling rate, DACs 2/3
source PAIF Receiver
R16
3:0
PL[3:0]
1001
PL[3:0]
Left O/P
Mute
Right O/P
Mute
DAC
0000
Control 2
0001
Left
Mute
10h
0010
Right
(L+R)/2
Mute
Mute
0011
Mute
0100
Left
0101
Left
Left
0110
0111
Right
(L+R)/2
Mute
Left
Left
1000
Right
Right
Right
Right
(L+R)/2
(L+R)/2
(L+R)/2
(L+R)/2
1001
Left
1010
Right
(L+R)/2
Mute
1011
1100
1101
Left
1110
Right
(L+R)/2
1111
6:4
DZFM[2:0]
000
Selects the source for ZFLAG
000 - All DACs Zero Flag
001 - DAC1 Zero Flag
010 - DAC2 Zero Flag
011 - DAC3 Zero Flag
100 - ZFLAG = 0
101 - ZFLAG = 0
110 - ZFLAG = 0
111 - ZFLAG = 0
7
IZD
0
Infinite zero detection circuit control and automute control
0 = Infinite zero detect automute disabled
1 = Infinite zero detect automute enabled
De-emphasis mode select
R17
2:0
DEEMP[2:0]
000
DAC
Control 3
DEEMP[0] = 1, enable De-emphasis on DAC1
DEEMP[1] = 1, enable De-emphasis on DAC2
DEEMP[2] = 1, enable De-emphasis on DAC3
11h
4
DEEMPALL
0
0 = De-emphasis controlled by DEEMP[2:0]
1 = De-emphasis enabled on all DACs
PD Rev 4.3 August 2007
81
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
