WM8580
Production Data
L/RDAx[7:0]
GAIN LEVEL
00(hex)
-∞ dB (mute)
01(hex)
-127.5dB
:
:
:
:
:
:
FE(hex)
FF(hex)
-0.5dB
0dB
Table 23 Digital Volume Control Gain Levels
Setting the DACATC register bit causes the left channel attenuation settings to be applied to both left
and right channel DACs from the next audio input sample. No update to the attenuation registers is
required for DACATC to take effect.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Attenuator Control
R19
DAC Control 5
13h
6
DACATC
0
0 = All DACs use attenuations as
programmed.
1 = Right channel DACs use
corresponding left DAC attenuations
Table 24 DAC Attenuation Register (DACATC)
The digital volume control also incorporates a zero cross detect circuit which detects a transition
through the zero point before updating the digital volume control with the new volume. This
mechanism helps prevents pops and clicks during volume transitions, and is enabled by control bit
DZCEN.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R19
DAC Control 5
13h
5
DZCEN
0
DAC Digital Volume Zero Cross
Enable
0 = Zero Cross detect disabled
1 = Zero Cross detect enabled
Table 25 Digital Zero Cross Register
PD Rev 4.3 August 2007
34
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
