Production Data
WM8580
With CONTREAD set, a single read-only register can be read back by writing to any other register or
to a dummy register. The register to be read is determined by the READMUX[2:0] bits. When a write
to the device is performed, the device will respond by returning the status byte in the register
selected by the READMUX register bits. This 3-wire interface read back method using a write access
is shown in Figure 7
REGISTER ADDRESS
BIT
LABEL
READMUX
[2:0]
DEFAULT
DESCRIPTION
R52
READBACK
34h
2:0
000
Determines which status register
is to be read back:
000 = Error Register
001 = Channel Status Register 1
010 = Channel Status Register 2
011 = Channel Status Register 3
100 = Channel Status Register 4
101 = Channel Status Register 5
110 = S/PDIF Status Register
Continuous Read Enable.
3
4
CONTREAD
READEN
0
0
0 = Continuous read-back mode
disabled
1 = Continuous read-back mode
enabled
Read-back mode enable.
0 = read-back mode disabled
1 = read-back mode enabled
Table 9 Read-back Control Register
The 3-wire interface readback protocol is shown below. Note that the SDO pin is tri-state unless CSB
is held low; therefore CSB must be held low for the duration of the read.
Figure 7 3-Wire SPI Compatible Interface Continuous Readback
If CONTREAD is set to zero, the user can read back directly from the register by writing to the
register address, to which the device will respond with data. The protocol for this system is shown in
Figure 8 below.
PD Rev 4.3 August 2007
19
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