WM8569
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CONTROL INTERFACE REGISTERS
ATTENUATOR CONTROL MODE
Setting the ATC register bit causes the left channel attenuation settings to be applied to both the left
and right channel of the DAC from the next audio input sample. No update to the attenuation
registers is required for ATC to take effect.
REGISTER ADDRESS
0000010
BIT
LABEL
DEFAULT
DESCRIPTION
3
ATC
0
Attenuator Control Mode:
DAC Channel Control
0: Right channel use right
attenuations
1: Right channel use left
attenuations
INFINITE ZERO DETECT ENABLE
Setting the IZD register bit will enable the internal infinite zero detect function:
REGISTER ADDRESS
0000010
BIT
LABEL
DEFAULT
DESCRIPTION
Infinite Zero Mute Enable
0 : Disable inifinite zero mute
1: Enable infinite zero mute
4
IZD
0
DAC Channel Control
With IZD enabled, applying 1024 consecutive zero input samples each stereo channel will cause that
stereo channel outputs to be muted to VMID. Mute will be removed as soon as that stereo channel
receives a non-zero input.
DAC OUTPUT CONTROL
The DAC output control word determines how the left and right input to the audio Interface are
applied to the left and right DAC:
REGISTER ADDRESS
0000010
BIT
LABEL
DEFAULT
DESCRIPTION
8:5
PL[3:0]
1001
PL[3:0]
Left
Right
Output
Output
DAC Control
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Mute
Left
Mute
Mute
Mute
Mute
Left
Right
(L+R)/2
Mute
Left
Left
Right
(L+R)/2
Mute
Left
Left
Left
Right
Right
Right
Right
(L+R)/2
(L+R)/2
(L+R)/2
(L+R)/2
Right
(L+R)/2
Mute
Left
Right
(L+R)/2
PP Rev 1.1 December 2005
22
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
