Production Data
WM8522
REGISTER MAP DESCRIPTION
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R0
7:0
LDA1[7:0]
11111111
(0dB)
Digital Attenuation data for Left channel DACL1 in 0.5dB steps. See
Table 16
(00h)
Digital
Attenuation
DACL1
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store LDA1 in intermediate latch (no change to output)
1: Store LDA1 and update attenuation on all channels
R1
7:0
8
RDA1[6:0]
UPDATE
11111111
(0dB)
Digital Attenuation data for Right channel DACR1 in 0.5dB steps.
See Table 16.
(01h)
Digital
Attenuation
DACR1
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store RDA1 in intermediate latch (no change to output)
1: Store RDA1 and update attenuation on all channels.
Soft Mute Select:
R2
(02h)
0
1
MUTEALL
DEEMPALL
PDWN
ATC
0
0 : Normal operation
DAC DEEMPH
1: Soft mute all channels
0
0
DEEMPH Select:
0 : Normal operation
1: De-emphasis all channels
Power Down all DAC’s Select:
0: All DACs enabled
2
1: All DACs disabled
3
0
Attenuator Control Mode:
0: Right channels use right attenuations
1: Right channels use left attenuations
IZD Enable
4
IZD
0
0 : Disable infinite zero mute
1: Enable infinite zero mute
8:5
PL[3:0]
1001
PL[3:0]
Left Output
Mute
Right Output
Mute
0000
0001
Left
Mute
0010
Right
(L+R)/2
Mute
Mute
0011
Mute
0100
Left
0101
Left
Left
0110
Right
(L+R)/2
Mute
Left
0111
Left
1000
Right
1001
Left
Right
1010
Right
(L+R)/2
Mute
Right
1011
Right
1100
(L+R)/2
(L+R)/2
(L+R)/2
(L+R)/2
1101
Left
1110
Right
(L+R)/2
1111
R3
1:0
FMT[1:0]
00
Interface Format Select:
(03h)
00 : Right justified mode
01: Left justified mode
10: I2S mode
DAC Phase
11: DSP modes A or B
PD Rev 4.0 July 2006
31
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
