Production Data
WM8522
RIGHT JUSTIFIED MODE
In right justified mode, the LSB of DIN1/2/3 is sampled by the WM8522 on the rising edge of BCLK
preceding a LRCLK transition. LRCLK are high during the left samples and low during the right
samples, see Figure 14.
Figure 14 Right Justified Mode Timing Diagram
I2S MODE
In I2S mode, the MSB of DIN1/2/3 is sampled by the WM8522 on the second rising edge of BCLK
following a LRCLK transition. LRCLK are low during the left samples and high during the right
samples.
Figure 15 I2S Mode Timing Diagram
PD Rev 4.0 July 2006
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