Production Data
WM8522
SAMPLING
RATE
System Clock Frequency (MHz)
128fs
192fs
256fs
384fs
512fs
768fs
(LRCLK)
32kHz
4.096
5.6448
6.144
6.144
8.467
8.192
11.2896
12.288
24.576
12.288
16.9340
18.432
36.864
16.384
22.5792
24.576
24.576
33.8688
36.864
44.1kHz
48kHz
9.216
96kHz
12.288
24.576
18.432
36.864
Unavailable Unavailable
192kHz
Unavailable Unavailable Unavailable Unavailable
Table 6 System Clock Frequencies Versus Sampling Rate
HARDWARE CONTROL MODES
When the MODE pin is held high, the following hardware modes of operation are available.
MUTE AND AUTOMUTE OPERATION
In both hardware and software modes, MUTE controls the selection of MUTE directly, and can be
used to enable and disable the automute function. This pin becomes an output when left floating and
indicates infinite ZERO detect (IZD) has been detected.
DESCRIPTION
0
1
Normal Operation
Mute DAC channels
Floating
Enable IZD, MUTE becomes an output to indicate when IZD occurs.
L=IZD not detected, H=IZD detected.
Table 7 Mute and Automute Control
Figure 9 shows the application and release of MUTE whilst a full amplitude sinusoid is being played
at 48kHz sampling rate. When MUTE (lower trace) is asserted, the output (upper trace) begins to
decay exponentially from the DC level of the last input sample. The output will decay towards VMID
with a time constant of approximately 64 input samples. When MUTE is de-asserted, the output will
restart almost immediately from the current input sample.
1.5
1
0.5
0
-0.5
-1
-1.5
-2
-2.5
0
0.001
0.002
0.003
0.004
0.005
0.006
Time(s)
Figure 9 Application and Release of Soft Mute
PD Rev 4.0 July 2006
13
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
