Production Data
WM8522
SOFTWARE CONTROL INTERFACE OPERATION
The WM8522 is controlled using a 3-wire serial interface in software mode or pin programmable in
hardware mode.
The control mode is selected by the state of the MODE pin.
3-WIRE (SPI COMPATIBLE) SERIAL CONTROL MODE
SDIN/DM is used for the program data, SCLK/IWL is used to clock in the program data and CSB/I2S
is used to latch the program data. SDIN/DM is sampled on the rising edge of SCLK/IWL. The 3-wire
interface protocol is shown in Figure 18.
Figure 18 3-Wire SPI Compatible Interface
1. B[15:9] are Control Address Bits
2. B[8:0] are Control Data Bits
3. CSB/I2S is edge sensitive – the data is latched on the rising edge of CSB/I2S.
CONTROL INTERFACE REGISTERS
ATTENUATOR CONTROL MODE
Setting the ATC register bit causes the left channel attenuation settings to be applied to both left and
right channel DACs from the next audio input sample. No update to the attenuation registers is
required for ATC to take effect.
REGISTER ADDRESS
0000010
BIT
LABEL
DEFAULT
DESCRIPTION
3
ATC
0
Attenuator Control Mode:
DAC Channel Control
0: Right channels use right
attenuations
1: Right channels use left
attenuations
PD Rev 4.0 July 2006
19
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
