WM8352
Production Data
12.1.1 CLOCKING THE AUDIO CODEC
The WM8352 audio CODEC core requires an accurate, low-jitter clock. Clocks for the ADCs, DACs,
DSP core functions, and the digital audio interface are all derived from a common internal clock
source, SYSCLK. This clock may be derived directly from MCLK, or may be generated from an FLL
using MCLK or alternate sources as an external reference. The SYSCLK source is selected by
MCLK_SEL. Many commonly-used audio sample rates can be derived directly from typical MCLK
frequencies.
The ADC and DAC sample rates are independently selectable, relative to SYSCLK, using
ADC_CLKDIV and DAC_CLKDIV. Refer to Section 12.3 for more details
12.1.2 CLOCKING THE DC-DC CONVERTERS
During a system start-up, no external clock signals are available. The WM8352 therefore generates
all internal clocks required for the DC-DC converters, system control and housekeeping functions.
These clocks are derived from the on-chip RC oscillator. The DC-DC converters’ nominal switching
rate is 2.0MHz and 1.0MHz.
12.1.3 INTERNAL RC OSCILLATOR
The internal RC Oscillator generates the system clock 2.0MHz as well as the clock for the DCDC
converters. The period of the generated clock is defined by the time needed for a fixed value
capacitor to be charged up to the reference voltage by a constant current source.
12.2 CRYSTAL OSCILLATOR
The on-chip crystal oscillator generates a 32.768kHz reference clock, which can be used to provide
reference clock for the Real Time Clock (RTC) in the WM8352. It may also be used as a reference
input to the FLL, for the purpose of generating the CODEC clocks. The oscillator is powered from
VRTC, so that it can keep running when no other power source is available. It requires an external
crystal on the X1 and X2 pins, as well as two capacitors and a resistor, connected as shown in Figure
34.
Figure 34 WM8352 Crystal Oscillator
PD, February 2011, Rev 4.4
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
