Production Data
WM8352
11.5 4-WIRE SERIAL CONTROL MODE
The 4-wire control interface uses the CSB, SCLK, SDATA and SDOUT pins, which are referenced to
the digital buffer supply, DBVDD. (In 4-wire mode, SDOUT is provided on GPIO6; CSB is provided
on GPIO7.)
4-wire control mode is selected by setting SPI_3WIRE = 1 and SPI_4WIRE = 1.
The Data Output pin, SDOUT, can be configured as CMOS or Open Drain, as described in Table 1.
In CMOS mode, SDOUT is driven low when not outputting register data bits. In Open Drain mode,
SDOUT is undriven when not outputting register data bits.
In Write operations (R/W=0), this mode is the same as 3-wire mode described above.
In Read operations (R/W=1), the SDATA pin is ignored following receipt of the valid register address.
SDOUT is driven by the WM8352.
The 4-wire control mode timing is illustrated in Figure 31 and Figure 32.
CSB
SCLK
SDATA
SDOUT
A6
A5
A4
A3
A2
A1
A0
B15
B15
B14
B14
B13
B13
B12
B12
B11
B11
B10
B10
B9
B9
B8
B8
B7
B7
B6
B6
B5
B5
B4
B4
B3
B3
B2
B2
B1
B1
B0
B0
R/W
control register address
control register data bits (READ/WRITE)
Figure 31 4-Wire Readback (CMOS)
CSB
SCLK
SDATA
SDOUT
A6
A5
A4
A3
A2
A1
A0
B15
B15
B14
B14
B13
B13
B12
B12
B11
B11
B10
B10
B9
B9
B8
B8
B7
B7
B6
B6
B5
B5
B4
B4
B3
B3
B2
B2
B1
B1
B0
B0
R/W
undriven
ud
control register address
control register data bits (READ/WRITE)
Figure 32 4-Wire Readback (Open Drain)
PD, February 2011, Rev 4.4
43
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
