WM8352
Production Data
The sequence of signals associated with a single register write operation is illustrated in Figure 23.
Figure 23 Control Interface 2-wire Register Write
The sequence of signals associated with a single register read operation is illustrated in Figure 24.
Figure 24 Control Interface 2-wire Register Read
The Control Interface also supports other register operations, as listed above. The interface protocol
for these operations is summarised below. The terminology used in the following figures is detailed in
Table 2.
TERMINOLOGY
DESCRIPTION
Start Condition
Repeated start
Acknowledge
Stop Condition
S
Sr
A
P
R/W
ReadNotWrite
0 = Write
1 = Read
[White field]
[Grey field]
Data flow from bus master to WM8352
Data flow from WM8352 to bus master
Table 2 Control Interface Terminology
Figure 25 Single Register Write to Specified Address
Figure 26 Single Register Read from Specified Address
PD, February 2011, Rev 4.4
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
