WM8326
Production Data
A summary of the WM8326 Resets is contained in Table 76 .
RESET TYPE
RESET CONDITION
DESCRIPTION
RESPONSE
AUTOMATIC
RECOVERY
System Reset
Power Sequence Failure
DC Converters, LDOs or CLKOUT
circuits have failed to start up within
the permitted time.
Assert R¯¯E¯S¯E¯T¯ pin.
Select OFF state.
No
See Section 11.3.
If the Reset Condition is
VPMIC (LDO12)
undervoltage, then the
WM8326 enters the
BACKUP state.
Device overtemperature
PVDD undervoltage (1)
An overtemperature condition has
been detected. See Section 26.
No
No
PVDD is less than the user-
selectable threshold SYSLO_THR
and SYSLO_ERR_ACT is
configured to select OFF in this
condition. See Section 24.4.
PVDD undervoltage (2)
Software OFF request
PVDD is less than the SHUTDOWN
voltage. See Section 24.4.
No
No
OFF has been commanded by
writing CHIP_ON = 0.
See Section 11.3
VPMIC (LDO12)
undervoltage
The WM8326 supply voltage is less
than the System Reset threshold.
See Section 24.4.
No
Device Reset
Watchdog timeout
Watchdog timer has expired and the Assert R¯¯E¯S¯E¯T¯ pin.
Yes
selected response is to generate a
Device Reset.
Shutdown and restart
the WM8326.
See Section 25.
Reset Register map
(Note the RTC and
software scratch
Hardware Reset
The R¯¯E¯S¯E¯T¯ pin has been pulled low
by an external source.
Yes
Yes
registers are not reset.)
See Section 24.2.
Converter (LDO or DC-
DC) Undervoltage
An undervoltage condition has been
detected and the selected response
is “Shut down system (Device
Reset)” See Section 15.
Software Reset
Software Reset
Software Reset has been
Assert R¯¯E¯S¯E¯T¯ pin.
Yes
commanded by writing to Register
0000h. See Section 12.5.
Shutdown and restart
the WM8326.
See Section 24.3 for
configurable options
regarding the Register
Map contents.
Power On Reset
Power On Reset
The WM8326 supply voltage is less
than the Power-On Reset (POR)
threshold. See Section 24.4.
The WM8326 is in the
NO POWER state.
No
All register contents are
lost.
Table 76 Resets Summary
In the cases where Automatic Recovery is supported (as noted in Table 76 ), the WM8326 will re-start
the WM8326 following the Reset, and return the device to the ON state. The particular Reset
condition which caused the return to the ON state will be indicated in the “ON Source” register - see
Section 11.3.
Note that, if a Watchdog timeout or Converter undervoltage fault persists, a maximum of 6 Device
Resets will be attempted to initiate the start-up sequence. Similarly, a maximum of 6 Software Resets
is permitted. If these limits are exceeded, the WM8326 will remain in the OFF state until the next valid
ON state transition event occurs.
The WM8326 asserts the R¯¯E¯S¯E¯T¯ low as soon as the device begins the shutdown sequence. R¯¯E¯S¯E¯T¯
is held low for the duration of the shutdown sequence and is held low in the OFF state. In the cases
where Automatic Recovery is supported, R¯¯E¯S¯E¯T¯ is automatically cleared (high) after successful
completion of the startup sequence. The duration of the R¯¯E¯S¯E¯T¯ low period after the startup sequence
has completed is governed by the RST_DUR register field described in Section 11.7.
PD, June 2012, Rev 4.0
130
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
