Production Data
WM8325
11.4 POWER STATE INTERRUPTS
Power State transitions are associated with a number of Interrupt event flags. Transitions to
BACKUP, SLEEP, ON or OFF states are indicated by the Interrupt bits described in Table 4. Each of
these secondary interrupts triggers a primary Power State Interrupt, PS_INT (see Section 23). This
can be masked by setting the mask bit(s) as described in Table 4.
ADDRESS
R16402
(4012h)
BIT
LABEL
PS_POR_EINT
DESCRIPTION
Power On Reset interrupt
(Rising Edge triggered)
2
Interrupt Status
2
Note: Cleared when a ‘1’ is written.
1
0
2
PS_SLEEP_OFF_EINT
PS_ON_WAKE_EINT
IM_PS_POR_EINT
SLEEP or OFF interrupt (Power state
transition to SLEEP or OFF states)
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
ON or WAKE interrupt (Power state
transition to ON state)
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
Interrupt mask.
R16410
(401Ah)
0 = Do not mask interrupt.
1 = Mask interrupt.
Interrupt Status
2 Mask
Default value is 1 (masked)
Interrupt mask.
IM_PS_SLEEP_OFF_EINT
IM_PS_ON_WAKE_EINT
1
0
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
Table 4 Power State Interrupts
11.5 POWER STATE GPIO INDICATION
The WM8325 can be configured to generate logic signals via GPIO pins to indicate the current Power
State. See Section 21 for details of configuring GPIO pins.
A GPIO pin configured as “ON state” output will be asserted when the WM8325 is in the ON state.
A GPIO pin configured as “SLEEP state” output will be asserted when the WM8325 is in the SLEEP
state.
PD, February 2012, Rev 4.0
37
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