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WM8325GEFL/V 参数 Datasheet PDF下载

WM8325GEFL/V图片预览
型号: WM8325GEFL/V
PDF下载: 下载PDF文件 查看货源
内容描述: 处理器电源管理子系统 [Processor Power Management Subsystem]
分类和应用:
文件页数/大小: 254 页 / 1569 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8325  
Production Data  
The WM8325 monitors the DC-DC Converters and LDOs during the ON sequence to ensure that the  
required circuits have powered up successfully before proceeding to the next timeslot. The nominal  
timeslot durations are extended if necessary in order to wait for the selected DC-DC Converters or  
LDOs to power up. If the ON sequence has not completed within 2 seconds of starting the transition,  
then a Power Sequence Failure has occurred, resulting in the OFF state being forced.  
The most recent ON or WAKE event can be determined by reading the bits in the “ON Source”  
register, R400Eh. The most recent OFF event can be determined by reading the bits in the “OFF  
Source” register, R400Fh.  
The “ON Source” register is updated when a new ON event occurs. The “OFF Source” register is  
updated when a new OFF event occurs. Note that some Reset conditions (see Section 24) result in  
an OFF transition followed by an ON transition; these events are recorded as Reset events in the “ON  
Source” register.  
The ON Source and OFF Source register fields are defined in Table 2.  
ADDRESS  
BIT  
LABEL  
CHIP_ON  
DEFAULT  
DESCRIPTION  
R16387  
(4003h)  
Indicates whether the system is  
ON or OFF.  
15  
0
Power State  
0 = OFF  
1 = ON (or SLEEP)  
OFF can be commanded by  
writing CHIP_ON = 0.  
Note that writing CHIP_ON = 1 is  
not a valid ‘ON’ event, and will not  
trigger an ON transition.  
14  
CHIP_SLP  
0
Indicates whether the system is in  
the SLEEP state.  
0 = Not in SLEEP  
1 = SLEEP  
WAKE can be commanded by  
writing CHIP_SLP = 0.  
SLEEP can be commanded by  
writing CHIP_SLP = 1.  
PWRSTATE_DLY  
Power State transition delay  
00 = No delay  
11:10  
10  
01 = No delay  
10 = 1ms  
11 = 10ms  
R16398  
(400Eh)  
ON_TRANS  
ON_GPIO  
Most recent ON/WAKE event type  
0 = WAKE transition  
15  
11  
10  
0
0
0
ON Source  
1 = ON transition  
Most recent ON/WAKE event type  
0 = Not caused by GPIO input  
1 = Caused by GPIO input  
Most recent WAKE event type  
0 = Not caused by PVDD  
ON_SYSLO  
1 = Caused by SYSLO threshold.  
Note that the SYSLO threshold  
cannot trigger an ON event.  
ON_WDOG_TO  
ON_SW_REQ  
Most recent WAKE event type  
0 = Not caused by Watchdog timer  
1 = Caused by Watchdog timer  
Most recent WAKE event type  
0 = Not caused by software WAKE  
7
6
0
0
1 = Caused by software WAKE  
command (CHIP_SLP = 0)  
PD, February 2012, Rev 4.0  
34  
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