WM8321
Production Data
DESCRIPTION
ADDRESS
BIT
LABEL
DEFAULT
RESET_HW
Most recent ON event type
1
0
0 = Not caused by Hardware
Reset
1 = Caused by Hardware Reset
Most recent ON event type
RESET_WDOG
0
0
0
0 = Not caused by the Watchdog
1 = Caused by a Device Reset
triggered by the Watchdog timer
R16399
(400Fh)
OFF_INTLDO_ERR
Most recent OFF event type
13
0 = Not caused by LDO13 Error
condition
OFF Source
1 = Caused by LDO13 Error
condition
OFF_PWR_SEQ
Most recent OFF event type
12
0
0 = Not caused by Power
Sequence Failure
1 = Caused by a Power Sequence
Failure
OFF_GPIO
OFF_PVDD
Most recent OFF event type
0 = Not caused by GPIO input
1 = Caused by GPIO input
Most recent OFF event type
0 = Not caused by PVDD
11
10
0
0
1 = Caused by the SYSLO or
SHUTDOWN threshold
OFF_THERR
Most recent OFF event type
0 = Not caused by temperature
1 = Caused by over-temperature
Most recent OFF event type
0 = Not caused by software OFF
9
6
0
0
OFF_SW_REQ
1 = Caused by software OFF
command (CHIP_ON = 0)
OFF_ON_PIN
Most recent OFF event type
0 = Not caused by the ON pin
1 = Caused by the ON pin
4
0
Table 2 Power State Control Registers
Table 3 lists all of the events which can trigger an ON, WAKE, OFF or SLEEP transition sequence. It
also lists the associated status bits of the ‘ON Source’ and ‘OFF Source’ register bits which are
asserted under each condition.
PD, February 2012, Rev 4.0
34
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