WM8321
Production Data
REFER TO
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
8 = DC-DC1 DVS Done
9 = DC-DC2 DVS Done
10 = External Power Enable1
11 = External Power Enable2
12 = System Supply Good (SYSOK)
13 = Converter Power Good (PWR_GOOD)
14 = External Power Clock (2MHz)
15 = Auxiliary Reset
Register 4042h GPIO11 Control
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R16451
(4043h)
GPIO12
Control
GP12_DIR
GPIO12 pin direction
0 = Output
15
1
1 = Input
GP12_PULL
[1:0]
GPIO12 Pull-Up / Pull-Down configuration
00 = No pull resistor
01 = Pull-down enabled
10 = Pull-up enabled
11 = Reserved
14:13
01
GP12_INT_MO
DE
GPIO12 Interrupt Mode
12
0
0 = GPIO interrupt is rising edge triggered (if
GP12_POL=1) or falling edge triggered (if
GP12_POL=0)
1 = GPIO interrupt is triggered on rising and falling
edges
GP12_PWR_D
OM
GPIO12 Power Domain select
0 = DBVDD
11
10
9
0
1
1 = PVDD
GP12_POL
GP12_OD
GPIO12 Polarity select
0 = Inverted (active low)
1 = Non-Inverted (active high)
GPIO12 Output pin configuration
0 = CMOS
0
1 = Open Drain
GP12_ENA
GP12_FN [3:0]
GPIO12 Enable control
0 = GPIO pin is tri-stated
1 = Normal operation
GPIO12 Pin Function
Input functions:
7
0
3:0
0000
0 = GPIO input (long de-bounce)
1 = GPIO input
2 = Power On/Off request
3 = Sleep/Wake request
4 = Sleep/Wake request (long de-bounce)
5 = Sleep request
6 = Power On request
7 = Watchdog Reset input
8 = DVS1 input
9 = DVS2 input
10 = HW Enable1 input
11 = HW Enable2 input
PD, February 2012, Rev 4.0
182
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