Production Data
WM8321
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
0 = No interrupt
1 = Interrupt is asserted
Real Time Clock and Crystal Oscillator primary interrupt
0 = No interrupt
RTC_INT
5
4
1
0
0
0
0
0
1 = Interrupt is asserted
OTP Memory primary interrupt
0 = No interrupt
OTP_INT
HC_INT
UV_INT
1 = Interrupt is asserted
High Current primary interrupt
0 = No interrupt
1 = Interrupt is asserted
Undervoltage primary interrupt
0 = No interrupt
1 = Interrupt is asserted
Register 4010h System Interrupts
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R16401
(4011h)
Interrupt
Status 1
PPM_SYSLO_
EINT
Power Path SYSLO interrupt
15
0
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
ON pin interrupt.
ON_PIN_CINT
12
11
8
0
0
0
0
0
0
0
0
0
(Rising and Falling Edge triggered)
Note: Cleared when a ‘1’ is written.
Watchdog timeout interrupt.
WDOG_TO_EI
NT
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
AUXADC Data Ready interrupt
(Rising Edge triggered)
AUXADC_DAT
A_EINT
Note: Cleared when a ‘1’ is written.
AUXADC Digital Comparator 4 interrupt
(Trigger is controlled by DCMP4_GT)
Note: Cleared when a ‘1’ is written.
AUXADC Digital Comparator 3 interrupt
(Trigger is controlled by DCMP3_GT)
Note: Cleared when a ‘1’ is written.
AUXADC Digital Comparator 2 interrupt
(Trigger is controlled by DCMP2_GT)
Note: Cleared when a ‘1’ is written.
AUXADC Digital Comparator 1 interrupt
(Trigger is controlled by DCMP1_GT)
Note: Cleared when a ‘1’ is written.
RTC Periodic interrupt
AUXADC_DCO
MP4_EINT
7
AUXADC_DCO
MP3_EINT
6
AUXADC_DCO
MP2_EINT
5
AUXADC_DCO
MP1_EINT
4
RTC_PER_EIN
T
3
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
RTC Alarm interrupt
RTC_ALM_EIN
T
2
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
PD, February 2012, Rev 4.0
155
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
