WM8321
Production Data
REFER TO
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Note that an Interrupt is always raised.
Protected by security key.
Current status of ON pin
0 = Asserted (logic 0)
1 = Not asserted (logic 1)
ON pin timeout period
00 = 1s
ON_PIN_STS
3
0
1:0
ON_PIN_TO
[1:0]
00
01 = 2s
10 = 4s
11 = 8s
Protected by security key.
Register 4005h ON Pin Control
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R16390
(4006h)
Reset
RECONFIG_A
T_ON
Selects if the bootstrap configuration data should be
reloaded when an ON transition is scheduled
15
1
0 = Disabled
Control
1 = Enabled
Protected by security key.
Software Reset Configuration.
SW_RESET_C
FG
10
1
Selects whether the register map is reset to default
values when Software Reset occurs.
0 = All registers except VPMIC domain and RTC are
reset by Software Reset
1 = Register Map is not affected by Software Reset
Protected by security key.
AUXRST_SLP
ENA
Sets the output status of Auxiliary Reset (GPIO)
function in SLEEP
6
1
0 = Auxiliary Reset not asserted
1 = Auxiliary Reset asserted
Protected by security key.
RST_SLP_MS
K
Masks the RESET pin input in SLEEP mode
0 = External RESET active in SLEEP
1 = External RESET masked in SLEEP
Protected by security key.
5
4
1
1
RST_SLPENA
RST_DUR [1:0]
Sets the output status of RESET pin in SLEEP
0 = RESET high (not asserted)
1 = RESET low (asserted)
Protected by security key.
Delay period for releasing RESET after ON or WAKE
sequence
1:0
11
00 = 3ms
01 = 11ms
10 = 51ms
11 = 101ms
Protected by security key.
Register 4006h Reset Control
PD, February 2012, Rev 4.0
148
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
