WM8253
Production Data
DEVICE CONFIGURATION
REGISTER MAP
The following table describes the location of each control bit used to determine the operation of the
WM8253. The register map is programmed by writing the required codes to the appropriate
addresses via the serial interface.
ADDRESS
<a5:a0>
000001
000010
000011
000100
000110
001000
001001
001010
001011
001100
001101
001110
001111
100000
DESCRIPTION
DEF
(hex)
03
RW
BIT
b7
b6
MODE3
DEL[0]
0
b5
b4
PGAFS[0]
0
b3
b2
0
b1
CDS
1
b0
EN
Setup Reg 1
Setup Reg 2
Setup Reg 3
Software Reset
Setup Reg 4
Setup Reg 5
Setup Reg 6
Reserved
RW
RW
RW
W
0
DEL[1]
0
PGAFS[1]
0
23
RLCDACRNG
CDSREF [1]
VRLCEXT
RLCV[3]
INVOP
RLCV[2]
1
1F
00
CDSREF [0]
RLCV[1]
RLCV[0]
05
RW
RW
RW
RW
RW
RW
RW
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
INTM[1]
INTM[0]
INTRLC
1
0
1
00
0
POSNNEG
VDEL[2]
VDEL[1]
VDEL[0]
VSMPDET
16
0
OPDLY[1]
OPDLY[0]
1
1
0
00
0
0
0
0
0
0
Reserved
00
0
0
0
0
0
0
Reserved
00
0
0
0
0
0
0
Reserved
00
0
0
0
0
0
0
Reserved
00
0
0
0
0
0
0
0
0
0
0
0
0
Reserved
00
R
DAC Value (Red)
80
RW
DACR[7
]
DACR[6
]
DACR[5]
DACR[4]
DACR[3]
DACR[2]
DACR[1]
DACR[0]
100001
DAC Value
(Green)
80
RW
DACG[7]
DACG[6]
DACG[5]
DACG[4]
DACG[3]
DACG[2]
DACG[1]
DACG[0]
100010
100011
DAC Value (Blue)
80
80
RW
W
DACB[7]
DAC[7]
DACB[6]
DAC[6]
DACB[5]
DAC[5]
DACB[4]
DAC[4]
DACB[3]
DAC[3]
DACB[2]
DAC[2]
DACB[1]
DAC[1]
DACB[0]
DAC[0]
DAC Value
(RGB)
101000
101001
PGA Gain (Red)
00
00
RW
RW
PGAR[7
]
PGAR[6
]
PGAR[5]
PGAG[5]
PGAR[4]
PGAG[4]
PGAR[3]
PGAG[3]
PGAR[2]
PGAG[2]
PGAR[1]
PGAG[1]
PGAR[0]
PGAG[0]
PGA Gain
(Green)
PGAG[7]
PGAG[6]
101010
101011
PGA Gain (Blue)
PGA Gain (RGB)
00
00
RW
W
PGAB[7]
PGA[7]
PGAB[6]
PGA[6]
PGAB[5]
PGA[5]
PGAB[4]
PGA[4]
PGAB[3]
PGA[3]
PGAB[2]
PGA[2]
PGAB[1]
PGA[1]
PGAB[0]
PGA[0]
Table 4 Register Map
PD, Rev 4.1, August 2011
21
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
