WM8216
Production Data
INPUT VIDEO SAMPLING
tMF1RS
tRSD
tRSFVSR
tVSD
tPR2
tMRVSR
tMFVSF
tVSFMR
tPD
tMCLKL
tMCLKH
tPER
E
O
E
O
E
O
E
n-5
n-4
n-3
n-2
n-1
Figure 1 Two-channel CDS Operation (CDS=1)
Input
Video
PIXEL n
tMF1RS
tPR1
tRSD
tRSFVSR
RSMP
tVSD
tVSFMR
tMRVSR
VSMP
tPD
tMFVSF
MCLK
tMCLKH
tMCLKL
tPER
Output
Data
OP[9:0]
n-8
n-7
n-6
n-5
Figure 2 One-channel CDS Operation (CDS=1)
Notes:
1. The relationship between input video signal and sample points is controlled by VSMP and RSMP.
2. When VSMP is high the input video signal is connected to the Video sampling capacitors.
3. When RSMP is high the input video signal is connected to the Reset sampling capacitors.
4. RSMP must not go high before the first falling edge of MCLK after VSMP goes low.
5. It is required that the falling edge of VSMP should occur before the rising edge of MCLK.
6. In 1-channel CDS mode it is not possible to have equally spaced Video and Reset sample points with a 45MHz
MCLK.
7. Non-CDS operation is also possible; RSMP is not required in this mode but can be used to control input clamping.
PD Rev 4.0 March 2007
w
8
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
