WM8196
Production Data
Figure 8 Typical Power up Sequence where DVDD1 is Powered before AVDD
Figure 8 shows a typical power-up sequence where DVDD1 is powered up first. It is assumed that
DVDD1 is already up to specified operating voltage. When AVDD goes above the minimum
threshold, Vpora, there is enough voltage for the circuit to guarantee PORB is asserted low and the
chip is held in reset. In this condition, all writes to the control interface are ignored. When AVDD rises
to Vpora_on, PORB is released high and all registers are in their default state and writes to the
control interface may take place.
On power down, where DVDD1 falls first, PORB is asserted low whenever DVDD1 drops below the
minimum threshold Vpord_off.
SYMBOL
Vpora
TYP
0.6
1.2
0.6
0.7
0.6
UNIT
V
V
V
V
V
Vpora_on
Vpora_off
Vpord_on
Vpord_off
Table 1 Typical POR Operation (typical values, not tested)
Note: It is recommended that every time power is cycled to the WM8196 a software reset is written
to the software register to ensure that the contents of the control registers are at their default values
before carrying out any other register writes.
PD Rev 4.3 March 2007
12
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
