WM8196
Production Data
SERIAL INTERFACE
tSPER
tSCKL tSCKH
SCK
tSSU
tSH
SDI
SEN
SDO
tSCE
tSEW tSEC
tSCRDZ
LSB
tSERD
tSCRD
ADC
DATA
ADC DATA
MSB
REGISTER DATA
Figure 5 Serial Interface Timing
Test Conditions
AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, TA = 25°C, MCLK = 24MHz unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SCK period
tSPER
41.6
ns
SCK high
tSCKH
tSCKL
tSSU
18.8
18.8
6
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SCK low
SDI set-up time
SDI hold time
tSH
6
SCK to SEN set-up time
SEN to SCK set-up time
SEN pulse width
tSCE
12
12
25
tSEC
tSEW
tSERD
tSCRD
tSCRDZ
SEN low to SDO = Register data
SCK low to SDO = Register data
SCK low to SDO = ADC data
30
30
30
Note:
1. Parameters are measured at 50% of the rising/falling edge
PD Rev 4.3 March 2007
10
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
