WM8152
Production Data
PIN DESCRIPTION
PIN
1
NAME
AGND2
DVDD1
VSMP
TYPE
Supply
DESCRIPTION
Analogue ground (0V).
2
Supply
Digital core (logic and clock generator) supply (5V)
Video sample synchronisation pulse.
3
Digital input
Digital input
4
MCLK
Master clock. This clock is applied at N times the input pixel rate (N = 2, 3, 6, 8 or
any multiple of 2 thereafter depending on input sample mode).
5
6
7
8
9
DGND
SEN
Supply
Digital ground (0V).
Digital input
Supply
Enables the serial interface when high.
Digital supply (5V/3.3V), all digital I/O pins.
Serial data input.
DVDD2
SDI
Digital input
Digital input
SCK
Serial clock.
Digital multiplexed output data bus.
ADC output data (d15:d0) is available in 4-bit multiplexed format as shown below.
A
B
C
D
10
11
12
13
OP[0]
OP[1]
Digital output
Digital output
Digital output
Digital output
d12
d13
d14
d15
d8
d4
d5
d6
d7
d0
d9
d1
d2
d3
OP[2]
d10
d11
OP[3]/SDO
Alternatively, pin OP[3]/SDO may be used to output register read-back data when
address bit 4=1 and SEN has been pulsed high. See Serial Interface description in
Device Description section for further details.
14
15
16
AVDD
AGND1
VRB
Supply
Supply
Analogue supply (5V)
Analogue ground (0V).
Analogue output Lower reference voltage.
This pin must be connected to AGND via a decoupling capacitor.
Analogue output Upper reference voltage.
This pin must be connected to AGND via a decoupling capacitor.
Analogue output Input return bias voltage.
This pin must be connected to AGND via a decoupling capacitor.
17
18
19
VRT
VRX
VRLC/VBIAS
Analogue I/O
Selectable analogue output voltage for RLC or single-ended bias reference.
This pin would typically be connected to AGND via a decoupling capacitor.
VRLC can be externally driven if programmed Hi-Z.
20
VINP
Analogue input
Video input.
PD Rev 4.0 January 2004
w
4
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
