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WM2637ID 参数 Datasheet PDF下载

WM2637ID图片预览
型号: WM2637ID
PDF下载: 下载PDF文件 查看货源
内容描述: 双路10位串行输入电压输出DAC ,内置基准 [Dual 10-Bit Serial Input Voltage Output DAC with Internal Reference]
分类和应用:
文件页数/大小: 11 页 / 265 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM2637  
Production Data  
FUNCTION OF THE LATCH CONTROL BITS (D15 AND D12)  
PURPOSE AND USE OF THE DOUBLE BUFFER  
Normally only one DAC output can change after a write. The double buffer allows both DAC outputs  
to change after a single write. This is achieved by the two following steps.  
1. A double buffer only write is executed to store the new DAC B data without changing the DAC A and B  
outputs.  
2. Following the previous step, a write to latch A is executed. This writes the serial interface register (SIR)  
data to latch A and also writes the double buffer contents to latch B. Thus both DACs receive their new  
data at the same time and so both DAC outputs begin to change at the same time.  
Unless a double buffer only write is issued, the latch B and double buffer contents are identical.  
Thus, following a write to latch A or B with another write to latch A does not change the latch B  
contents.  
Three data transfer options are possible. All transfers occur immediately after NCS goes high (or on  
the sixteenth positive SCLK edge, whichever is earlier) and are described in the following sections).  
LATCH A WRITE, LATCH B UPDATE (D15 = HIGH, D12 = LOW)  
The serial interface register (SIR) data are written to latch A and the double buffer latch contents  
are written to latch B. The double buffer contents are unaffected. This program bit condition allows  
simultaneous output updates of both DACs.  
LATCH A  
LATCH B  
TO DAC A  
TO DAC B  
SERIAL  
INTERFACE  
REGISTER  
DOUBLE  
BUFFER LATCH  
D12 = LOW  
D15 = HIGH  
Figure 7 Latch A Write, Latch B Update  
LATCH B AND DOUBLE BUFFER 1 WRITE (D15 = LOW, D12 = LOW)  
The SIR data are written to both latch B and the double buffer. Latch A is unaffected.  
LATCH A  
LATCH B  
TO DAC A  
TO DAC B  
SERIAL  
INTERFACE  
REGISTER  
DOUBLE  
BUFFER LATCH  
D12 = LOW  
D15 = LOW  
Figure 8 Latch B and Double Buffer Write  
WOLFSON MICROELECTRONICS LTD  
PD Rev 1.0 July 99  
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