W90N745CD/W90N745CDG
BITS
DESCRIPTIONS
[31:16]
Reserved
MREPC
The MAC Remote Pause Count shows the current value of the
down count timer that starts to count down from the value of operand
of the transmitted PAUSE control frame.
[15:0]
DMA Receive Frame Status Register (DMARFS)
The DMARFS is used to keep the Length/Type field of each incoming Ethernet packet. This register is
writing clear and writes 1 to corresponding bit clears the bit.
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
DMARFS
0xFFF0_30C8
R/W DMA Receive Frame Status Register
0x0000_0000
31
23
15
7
30
22
14
6
29
21
13
5
28
20
12
4
27
Reserved
19
Reserved
26
18
10
2
25
17
9
24
16
8
11
RXFLT
RXFLT
3
1
0
BITS
DESCRIPTIONS
[31:16]
Reserved
RXFLT
The Receive Frame Length/Type keeps the Length/Type field of
each incoming Ethernet packet. If the bit EnDEN of MIEN is enabled
and the Length/Type field of incoming packet has received, the bit
DENI of MISTA will be set and trigger interrupt. And, the content of
Length/Type field will be stored in RXFLT.
[15:0]
Publication Release Date: September 22, 2006
- 147 -
Revision A2
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