W90N745CD/W90N745CDG
Continued.
BITS
DESCRIPTIONS
The Preamble Suppress controls the preamble field generation of
MII management frame. If the PreSP is set to high, the preamble field
generation of MII management frame is skipped.
[18]
PreSP
1’b0: Preamble field generation of MII management frame is not
skipped.
1’b1: Preamble field generation of MII management frame is skipped.
The Busy Bit controls the enable of the MII management frame
generation. If S/W wants to access registers of external PHY, it set
BUSY to high and EMC generates the MII management frame to
external PHY through MII Management I/F.
The BUSY is a self-clear bit. This means the BUSY will be cleared
automatically after the MII management command finished.
[17]
[16]
BUSY
1’b0: The MII management has finished.
1’b1: Enable EMC to generate a MII management command to
external PHY.
The Write Command defines the MII management command is a
read or write.
Write
1’b0: The MII management command is a read command.
1’b1: The MII management command is a write command.
[15:13]
[12:8]
[7:5]
Reserved
The PHY Address keeps the address to differentiate which external
PHY is the target of the MII management command.
PHYAD
Reserved
-
The PHY Register Address keeps the address to indicate which
register of external PHY is the target of the MII management
command.
[4:0]
PHYRAD
Publication Release Date: September 22, 2006
- 123 -
Revision A2
WINBOND [ WINBOND ]
