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W83627HG-AW 参数 Datasheet PDF下载

W83627HG-AW图片预览
型号: W83627HG-AW
PDF下载: 下载PDF文件 查看货源
内容描述: WINBOND LPC I / O [Winbond LPC I/O]
分类和应用: PC时钟
文件页数/大小: 131 页 / 1020 K
品牌: WINBOND [ WINBOND ]
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W83627HF/ F/ HG/ G  
8. SERIAL IRQ  
W83627HF supports a serial IRQ scheme. This allows a signal line to be used to report the legacy  
ISA interrupt rerquests. Because more than one device may need to share the signal serial IRQ signal  
line, an open drain signal scheme is used. The clock source is the PCI clock. The serial interrupt is  
transfered on the IRQSER signal, one cycle consisting of three frames types: a start frame, several  
IRQ/Data frame, and one Stop frame.  
8.1  
Start Frame  
There are two modes of operation for the IRQSER Start frameQuiet mode and Continuous mode.  
In the Quiet mode, the peripheral drives the SERIRQ signal active low for one clock, and then tri-  
states it. This brings all the states machines of the peripherals from idle to active states. The host con-  
troller will then take over driving IRQSER signal low in the next clock and will continue driving the  
IRQSER low for programmable 3 to 7 clock periods. This makes the total number of clocks low for 4 to  
8 clock periods. After these clocks, the host controller will drive the IRQSER high for one clock and  
then tri-states it.  
In the Continuous mode, only the host controller initiates the START frame to update IRQ/Data line in-  
formation. The host controller drives the IRQSER signal low for 4 to 8 clock periods. Upon a reset, the  
IRQSER signal is defaulted to the Continuous mode for the host controller to initiate the first Start  
frame.  
8.2  
IRQ/Data Frame  
Once the start frame has been initiated, all the peripherals must start counting frames based on the  
rsing edge of the start pulse. Each IRQ/Data Frame is three clocks: Sample phase, Recovery phase,  
and Turn-around phase.  
During the Sample phase, the peripheral drives SERIRQ low if the corresponding IRQ is active. If the  
corresponding IRQ is inactive, then IRQSER must be left tri-stated. During the Recovery phase, the  
peripheral device drives the IRQSER high. During the Turn-around phase, the peripheral device left  
the IRQSER tri-stated.  
The IRQ/Data Frame has a number of specific order, as shown in Table 8-1.  
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