W83627HF/ F/ HG/ G
CRF3 （Default 0x00）
BIT
DESCRIPTION
These bits select IRQ resource for IRQIN1.
These bits select IRQ resource for IRQIN0.
7 - 4
3 - 0
CRF4 （Reserved）
This register is reserved..
CRF5 （PLED mode register. Default 0x00）
BIT
DESCRIPTION
7 - 6
PLED mode select
00： Power LED pin is tri-stated.
01： Power LED pin is drived low.
10： Power LED pin is a 1Hz toggle pulse with 50 duty cycle
11： Power LED pin is a 1/4Hz toggle pulse with 50 duty cycle.
Reserved
5 - 4
3
WDTO count mode select
0： Second
1： Minute
2
Enable the rising edge of keyboard Reset（P20）to force Time-out event.
0： Disable
1： Enable
Reserved
1 - 0
CRF6 （Default 0x00）
Watch Dog Timer Time-out value. Writing a non-zero value to this register causes the
counter to load the value to Watch Dog Counter and start counting down. If the Bit 7 and Bit 6
are set, any Mouse Interrupt or Keyboard Interrupt event will also cause the reload of previ-
ously-loaded non-zero value to Watch Dog Counter and start counting down. Reading this
register returns current value in Watch Dog Counter instead of Watch Dog Timer Time-out
value.
BIT
DESCRIPTION
7 - 0
0x00 Time-out Disable
0x01 Time-out occurs after 1 sec / min
0x02 Time-out occurs after 2 sec / min
0x03 Time-out occurs after 3 sec / min
.
.
.
.
0xFF Time-out occurs after 255 sec / min
Publication Release Date: June 09, 2006
Revision 2.27
- 99 -
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