W83195WG-382/W83195CG-382
STEPLESS FOR ATI K8 CLOCK GENERATOR
7.11 Register 10: Reserved ( Default : 3Bh )
7.12 Register 11: ( Default : 0Eh )
BIT
AFFECTED PIN/
FUNCTION NAME(S)
PWD
FUNCTION DESCRIPTION
TYPE
7
6
5
4
3
2
1
0
SPH VAL<3>
SPH VAL<2>
SPH VAL<1>
SPH VAL<0>
SPL VAL<3>
SPL VAL<2>
SPL VAL<1>
SPL VAL<0>
0
0
0
0
1
1
1
0
Spread Spectrum Down Counter bit 3 ~ bit 0
2’s complement representation.
Ex: 1 -> 1111 ; 2 -> 1110 ; 7 -> 1001 ; 8 ->
1000
Spread Spectrum Up Counter bit 3 ~ bit 0.
R/W
7.13 Register 12: ( Default : XXh )
BIT
AFFECTED PIN/
FUNCTION NAME(S)
PWD
FUNCTION DESCRIPTION
TYPE
7
6
5
4
3
2
1
0
Reserved
KVAL<9>
KVAL<5>
KVAL<4>
KVAL<3>
KVAL<2>
KVAL<1>
KVAL<0>
0
X
X
X
X
X
X
X
Reserved
Define the
PCI
divider ratio
Table-2 integrate the all divider configuration
Define the
SRC
divider ratio
Refer to Table-2
Define the
CPU
divider ratio
Refer to Table-2
R/W
R/W
R/W
R/W
Table-2 CPU, SRC, PCI divider ratio selection Table
HTT/PCI
LSB
MSB
0
BIT5
1
0
SRC
BIT3
1
00
01
CPU
BIT1,0
10
11
Bit2/
Bit4/
Bit9
0
1
Reserved
Div12
Div10
Div15
Reserved
Div8
Div6
Div10
Div2
Div8
Div3
Div8
Div4
Div8
Div6
Div8
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Publication Release Date: Feb 2006
Revision 0.6
WINBOND [ WINBOND ]
