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27C4096 参数 Datasheet PDF下载

27C4096图片预览
型号: 27C4096
PDF下载: 下载PDF文件 查看货源
内容描述: 256K ×16的电可擦除EPROM [256K X 16 ELECTRICALLY ERASABLE EPROM]
分类和应用: 可编程只读存储器电动程控只读存储器
文件页数/大小: 15 页 / 228 K
品牌: WINBOND [ WINBOND ]
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Preliminary W27C4096  
FUNCTIONAL DESCRIPTION  
Read Mode  
Like conventional UVEPROMs, the W27C4096 has two control functions, both of which produce data  
at the outputs. CE is for power control and chip select. OE controls the output buffer to gate data to  
the output pins. When addresses are stable, the address access time (TACC) is equal to the delay  
from CE to output (TCE), and data are available at the outputs TOE after the falling edge of OE, if  
TACC and TCE timings are met.  
Erase Mode  
The erase operation is the only way to change data from "0" to "1." Unlike conventional UVEPROMs,  
which use ultraviolet light to erase the contents of the entire chip (a procedure that requires up to half  
an hour), the W27C4096 uses electrical erasure. Generally, the chip can be erased within 100 mS by  
using an EPROM writer with a special erase algorithm.  
Erase mode is entered when VPP is raised to VPE (14V), VCC = VCE (5V), CE low, OE high, A9 =  
VPE (14V), A0 low, and all other address pins low and data input pins high.  
Erase Verify Mode  
After an erase operation, all of the words in the chip must be verified to check whether they have  
been successfully erased to "1" or not. The erase verify mode automatically ensures a substantial  
erase margin. This mode will be entered after the erase operation if VPP = VPE (14V), CE high, and  
OE low.  
Program Mode  
Programming is performed exactly as it is in conventional UVEPROMs, and programming is the only  
way to change cell data from "1" to "0." The program mode is entered when VPP is raised to VPP  
(12V), VCC = VCP (5V), CE low, OE high, the address pins equal the desired address, and the input  
pins equal the desired inputs.  
Program Verify Mode  
All of the words in the chip must be verified to check whether they have been successfully  
programmed with the desired data or not. Hence, after each word is programmed, a program verify  
operation should be performed. The program verify mode automatically ensures a substantial  
program margin. This mode will be entered after the program operation if VPP = VPP (12V), CE high,  
OE low and VCC = VCP (5V).  
Erase/Program Inhibit  
Erase or program inhibit mode allows parallel erasing or programming of multiple chips with different  
data. When CE high , VPP = VPP/VPE (12V/14V), and VCC = 5V, erasing or programming of non-  
target chips is inhibited, so that except for the CE and VPP, and VCC, the W27C4096 may have  
common inputs.  
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