WCMA1008U1X
Switching Waveforms
(continued)
Write Cycle No. 1(WE Controlled)
t
WC
ADDRESS
t
SCE
CE
1
CE
2
t
AW
t
SA
WE
t
PWE
t
HA
OE
t
SD
DATA I/O
NOTE
t
HZOE
DATA
IN
VALID
t
HD
Write Cycle No. 2 (CE
1
or CE
2
Controlled)
t
WC
ADDRESS
t
SCE
CE
1
t
SA
CE
2
t
AW
t
PWE
WE
t
HA
OE
t
SD
DATA I/O
DATA
IN
VALID
t
HD
Notes:
12. Data I/O is high impedance if OE = V
IH
.
13. During this period, the I/Os are in output state and input signals should not be applied.
14. If CE
1
goes HIGH and CE
2
goes LOW simultaneously with WE HIGH, the output remains in a high-impedance state.
7